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High effeciency design withHiperTFS-2 TFS7704H

Posted by: Astrid1 on

I have any question about HiperTFS-2 design.

My design have universal voltage input, PFC PFS7525H and output 50V  0 - 3.5A, 66kHz Ilinit 0.7

1.  Output Diode speed and voltage rating + subler design.

PIXIs Designer on VPIVMAINF say Main Forward Diode peak-inverse voltage (at VDSOP), including derating 183V if use 100% derating, but if derating reduce on 80% is VPIVMAINF 228V  I did not fully understand the significance derating coeficient and  I do not know whether to choose 200 or 300/400 V

200V diode BYV32E-200 have speed 20ns, 300V STTH2003C 35ns and 400V BYV34-400 50ns i.e. high switching lost..

Do you have any recommendations for design snubler on this diode?

2. MOSFET CONDUCTION LOSS

piXiS DO NOT CALCULATE MOSFET CONDUCTION LOSS ON LINE 82 #N/A. Why?

 

Comments

Submitted by PI-Neela on 09/12/2016

could you share with us your PIXL design copy? please also include PFD version since sometime I can not open the design file due to version differences.

Submitted by Astrid1 on 09/12/2016

OK her is new HiperTFS2 Forward Design1 from last version PIXIs Designer 9.1.6.3

004 VMAIN          50V
005 IMAIN          3A
006 VOUT2          25V
007 IOUT2           1A
029 CIN_ACTUAL   220uF
066 DEVICE     TFS7704
067 Freqiency    66kHz
074 KI             0,7
094 Core Type    ETD34
119 HI SIDE BIAS    NO
141 OD_PRI         0,7mm
142 FILAR_PRI        3x
151 FOIL/WIRE     WIRE
152 OD             0,6mm
153 FOLAR SEC1       3x
163 FOIL/WIRE     WIRE
164 OD             0,6mm
165 FOLAR SEC2       3x
273 IO_SB          1,5A
284 Select C.Limit LOW
313 Core Type      EE16

all other default value

1. Feedback Pin Resistor value
Line 75 R(FB) Feedback Pin Resistor value is calculated 1740 KOhm, but datasheet say L1 70% Open L2 90% 511k, but PIXI L1=L2=1740k.
I thing this is error.

2. Main MODFET losses
Line 82,83,85,86 not calculated #NA
I do not know why?

3.DC resistance of secondary winding
Line 168 DCR_SEC2 calculate DC resistance of secondary winding , but in my example calculate 154.76mOhm for 3x 0,7mm and if increase filar to 4x 0,7mm
206,35 mOhm , for 1x 0,7mm 51,59mOhm. Oncle Georg Simon Ohm is confused.
Line 162 IRMS_SEC2 and 169 PCOND_SEC2 do not calculated #NA
 
4. Diode Derating
Line 260 VPIVMAINF Main Forward Diode peak-inverse voltage (at VDSOP), including derating
PIX Say 182,1 V for derating 1 and 227.6 for 0.8
I'm not sure what it is Derating coeficient?

Attachment Size
HiperTFS2 Forward Design1.pixls 76.5 KB
Submitted by PI-Neela on 10/11/2016

answers to Q1: per datasheet, for 0.7 selection, the pin is open. you can follow the datasheet. The PIXL provide 1740, which is a relatively larger resistor, so I suspect on board, it still will work as 0.7 Ilim rating. However, the PIXL is in correct when you choose 0.9 option. It will be corrected.

Ansers to Q2: From my version, it does the calcualtion. Could you share with us your version information on the top right corner of the TFS2 spreadsheet? Or, you can print the design as PFD files, which show all the version informatiuon we can review.

answer to Q3: it is incorrect calculation from PIXL, which will be corrected.

my version calculates line 162. Again, your PDF copy will carry necessary version information for our review

answer to Q4: derating means if you need diode rated voltage to be higher than what the max. running voltage, then you apply this detrating (input from PIXL) to the diode rated voltage, results should be lower than the max running voltage. for example, you have diode voltage rating of 200V (from datasheet), application need 0.9 derating (which is from PIXL input), then the maximum real running voltage should not be higher than 200V*0.9=180V to make a satisfacorty design.