DPAswitch feedback network

Posted by: simonezanada on 01/29/2013

Dear PI engineer,

I’m new to SMPS with PI devices. I’m currently designing a DC-DC converter for a industrial input voltage range (16-32V), with a single 52V/20W output, using a DPA425 as device and EFD15 core, in a flyback topology.

I started from the basic circuit that came out from the software, but as it didn’t permit me to choose an output voltage higher than 50V, I decided to use 2 stacked windings of +/- 26V, connecting the feedback between the 2 outputs, then adding a 30V zener diode in series to the anode of the optocoupler, in order to reach safer voltage levels for the TL431. Referring to figure 5 of AN-57, the values actually present in the feedback network are:

RF1 = 5,4 k

RF2 = 107 k

RF3 = 68 ohm

CF1 = 1 nF

RF4 = 7,68 ohm

CF2 = 150 nF

Optocoupler = LTV817A, with a 1k in parallel to the emitting side

The system seems to work fine, also in terms of load transient response, until the DPA works in DCM mode (e.g., using it at 10W). The problem arises in a full load condition (CCM mode): when the input voltage is near 30V (e.g. 29V), the circuit starts emitting an audible sound, but just for an increment of 0,5V in input voltage; after that, slightly increasing the input again, the sound disappears and a noticeable ripple on the output voltage takes place (about 1Vpp, with period of 1,3ms - see attached picture). Now, if the input is furtherly increased, the control is lost, the output voltage falls and the DPA enters a periodic auto-restart mode. I tried to increase the value of CF1, and to replace the zener with a 1k resistor, but with no results. Instead, this oscillation took place with no load applied too.

At a first sight, I thought it could be an overload fault, but it shouldn’t make sense. In fact, while rising the input voltage, the duty cycle is reduced and the peak current on the primary side. I had confirmation of this fact by checking the current waveform in the primary winding, with a peak always well below the limits given in the datasheet.

Then, reading the introduction of AN-57, now I suspect there’s a problem in the loop compensation network, but I don’t know how to solve it. I couldn’t find any reference document on this matter for the DPA-switch, and also don’t know how the “exotic” presence of the 30V zener has to be treated.

I mounted 2 different prototypes of this circuit, with the same component values. I also mounted sockets for DPA and transformer, in order to use the same specimen on both the boards, to make a sort of comparison. Another strange fact is that, even everything seems to be identical, one of these board doesn’t present the problem described above, unless I invert the bias winding for DPA as in a forward topology, instead of a flyback one.

Can anybody help?

Thanks,

Simone

Comments

You need to increase RF3 to at least 1K and CF1 100nF. RF4 to 200 ohm, CF2 needs to be lower -- perhaps 20nF. If it contiues to oscillate then continue to lower gain by increasing CFI but when you don this add 300 ohm in series with CF1. You can also lower gain by increasing RF3 but there will be a limit where you cannot get enough current through opto to maintain regulation at light load.

Dear PI-Surak,

thanks for your advices. In effect, I didn't notice that the program offers the possibility to plot Bode diagrams of the loop tranfer function, neither that one can choose the position of the crossover frequency. With the preceeding values (referring to a default target crossover at 10kHz), it turns out that, even with a good phase margin at crossover, a bad fall in phase is present about 1 decade before, below -180deg. Could this be the reason of the instability I noticed?

So, in the meantime, I tried the values the program recommends to get a target crossover of 1kHz, wich are very similar to the ones you are telling me now. They are as follows:

CF1 = 100nF

RF3 = 2,94K

RF4 = 332 ohm

CF2 = 47nF

Now, at full load (and CCM mode), the system reacts slowly, but seems fine for any input voltage in the range 16-32V, with no particular oscillations.

But - it was too good to be true - a pair of input voltages (i.e. 20V and 30V) are now affected by output oscillations, this time at HALF LOAD, that is in DCM mode...

I have read into depth the AN-57, and it seems to me that a good compensation made for CCM should work as well as in DCM. I also noticed that, while presenting the gain of TL431 (page 14, formula 23) , there's no evidence that its own frequency response had been taken into account, except its open loop gain at low frequency. Maybe there are some more singularities in the loop gain to be considered?

What should I do to compensate in DCM? What could be the origin of these new oscillations? A bad phase (near 180deg) at their frequencies?

Thank you again,

Simone

Perhaps experiement with diferent values for phase lead ckt CF4 and RF2 and also maybe add more capacitane to output filter -- epsecially use electroyltic to give more phase due to higher ESR.