Problem with full load, full Duty cycle in Flyback PS with TOP266EG universal input 36V, 1.37A design.

Hi,

I do not correctly understand the problem.

Is this design operating in CCM? In CCM the duty cycle depends only on input and output voltage and turns ratio and is independent on the inductance value.

PIExpert though accounts for the voltage drop across the MOSFET inside the TOPSWitch and its calculation is very conservative. This can lead to some variation in duty cycle.

What exactly is the problem with your design? Is it unable to maintain regulation?

In order to understand your problem better, I will prefer to see your schematic, board layout and review the PIExpert design. If all those things look fine, I will need a copy of the Drain voltage and current waveforms so that I can determine what exactly the problem is.

Please provide the information described in the paragraph above if you need further support.

Regards

PI-Sarek

Hi,

Sorry for miss of informations.
Design work in CV mode in fact. You can find schematic on attachment. For the moment it is only prototype and PCB is not done.
Transformer data given by manufacturer is:
Primary 1 41 spires wire 40/100
Secondary 22 spires wire 4 x 20/100 TEXE
Bias 8 spires wire 40/100
Primary 2 41 spires wire 40/100
Circuit EFD30 N87 Al120
L3-1 = 787 µH +/- 10% à 1 KHz 100 mV

In fact power supply works and regulate at 36Vdc until entire Vac input (85 to 265V) without any charge.
@ 220Vac @1A it works but as we go above 1A in current, output decrease until 20V @1.4A.
Same thing with 110Vac input. As soon as we go above 800mA, output decrease.

We noticed that topswicth is able to work in low frequency low duty cycle mode and multicycle frequency mode but never switch in full frequency mode and so can't deliver enough power. But i don't understand why it never switch in this mode.
Input capacitor is good and we don't have ripple. Clamping seems to be good too. Phase Margin and loop compensation with PC817D and TL431 seems to work well.
We did test without output post filter and with output capacitor 110µF. We noticed that voltage decrease only to 30.6v @1.4A @ 220Va but regulation under 1A is worst. i mean without charge we have 36Vdc but as soon as we put 100mA charge output DC decrease.

Do you have any idea please to help us please?

Hi,

Ok, now regulation is working. I had some troubles with my prototype and the layout. The oscilloscope probe introduced some troubles in regulation when measuring the VB. Extra capacitor of 15pF was the problem. I am waiting real PCB now.
My new question is how to calculate components to create PFC which meet my requirement of 0.9
Do you have any idea please?
Can i use the valley filter which is defined for constant load?
Can i use PFC as in DER-136 which seems to be defined for constant PWM mode?

Thanks

Hi,

You could use the valley fill circuit however that is not practical for a wide input voltage range application. You can use the valley fill as long as your circuit can be configured only for 110V input or 230V input.

You could use the concept shown in in DER-136 which is a DCM Flyback converter without any significant input filter which automatically yields high PF.It is recommended that you use a TOPSwitch -GX part if you are considering this approach since TOPSwitch-GX is a fixed frequency solution unlike TOPSwitch-JX which has variable frequency and low frequency modes of operation which would not yield as high a PF at lighet load levels.

Another option would be to use a dedicated PFC front end such as HiperPFS family from Power Integrations.

Regards

PI-Sarek

Hi Sarek,

Thank you for last information regarding the PFC.
Finally my choice is to use active PFC with PFS704 component. I have associated the boost converter aned flyback converter on my schematic and i am going to realize the PCB for the prototype.
I just have some doubts regarding the inductor. With PIXIs designer tool calculations give inductor of 1.410mH at peak of VACMIN and full load and 2.589mH at no load. It seems very high value i think. Could you advise about this value which is mainly a function of VO, frequency, and Kp?
Moroever could you tell me if spice model is available for PFS chip? I already modelized TOPswithc and would like to simulate entire design in order to optimize efficiency and values of components.
Anyway don't hesitate if you have any comment on schematic.

Thank you

Renan

At least you can try a higher value X pin resistor, and see what happen.

Hi,

Thank you. Do you have any other comments or idea?
And regarding spice model do you have solution?

Thanks

Renan

I donot have the spice model. But you can modify the current setting resistor to increase the current limit.And also check the resistors connected to line, since they may related to line feed forward/ current limit too.