About overcurrent protection of inn3279C_H217.
About overcurrent protection of inn3279C_H217.
When using the overcurrent protection on the primary side, how many milliseconds does it take from the sudden change in load to the overcurrent state until the actual latch stop?
There are times when the output voltage can be kept and times when the voltage drops in the overcurrent state. Why do these states occur individually?
How many milliseconds are individually?
please tell me.
When using the overcurrent protection on the primary side, how many milliseconds does it take from the sudden change in load to the overcurrent state until the actual latch stop? There are times when the output voltage can be kept and times when the voltage drops in the overcurrent state. Why do these states occur individually? How many milliseconds are individually? It would be helpful if you could explain it in the document material. Attached voltage / current waveform
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thank you for your answer. I understand that there is no overcurrent protection function on the primary side. However, if the load is heavy, will Vout become less than 63% and latch off? This time, I have attached a waveform that shows the drain voltage and FORWERD terminal voltage. However, when I connected the probe to the FORWERD terminal, the waveform changed a little, but I was able to reproduce the same latch-off after a delay. The IS terminal and GND terminal are short-circuited so that the overcurrent protection on the secondary side does not work. We are looking for a way to reduce the sensitivity of overcurrent protection with this IC. About 50ms is fine, but please tell me if there is a delay method.
| Attachment | サイズ |
|---|---|
| CH1:drain CH2:Load CH3:Vout CH4:Forward (130.32 KB) | 130.32 KB |
Hello
When a heavy load transient is applied, the Constant Voltage loop gets activated and it increases the switching frequency to bring back the output voltage to reference value. Since the secondary side over current protection does not work, we believe that this leads to continuous secondary request at above the overload detection frequency (110 kHz) which leads to latch off. This can be verified by observing the primary drain to source/Forward/BPS pin voltage.
We are not able to see any of the 4 waveforms you have mentioned in the attachment you had posted. Could you please check on this again?
Regards
PI-Radiant
Hello,
Thank you for using our product. INN3279C_H217 does not have over current protection on primary. It is present only on the secondary.
In case there is a capacitor across Rsense resistor i.e on IS pin, one may find a lag in the response of the IC to a step change in load. However, in the waveform you had provided, Vout is at 5V for about 25ms which is too large a time for it to be caused by RC time lag. In case you can provide us with Primary Drain to Source voltage or FWD pin voltage along with Vout and Iout, and also let us know the capacitor value (if any), we might be able to analyze this better.
If Vout is less than 63% of the set output voltage for more than 49.5ms (Feedback pin latching threshold-from datasheet), the IC would latch off. However, in the waveform, Vout is 1V for about 35ms before the IC latches off. In case you are able to provide us with the schematic (with atleast that of secondary side), we might be able to analyze the 2 state behavior better. It would also be helpful if you could provide us with information on Rated voltage and current of this design.
Regards
PI_Radiant