Y1 & Y2 cap secondary connection modes

Hi Christos,

Thank you for using Power Integrations' part.

Regarding your question, you can actually use either mode whichever will give you better EMI result.  Another connection consideration is actually the layout whichever has easier routing that will pass the EMI requirement.  Thanks.

Thank you. I'll try out the possible connections.

Regards.

Christos

Hi Christos,

Another consideration is placing the spark gap for ESD which is usually placed across the Ycap terminals.  Basically it's also layout consideration.  Thank you.

Thank you again, PI-Mallora

Yes, I've seen these tips in the P. I. application notes.

Bringing up the capacitor connection again, I'd like to have something to guide me on the layout design before the EMI tests.

A quick analisys suggests that the best connection of the capacitor secondary side is directy to the transformer pin instead of the power supply return pin, since the first one provides the shortest comming back path to the capacitively coupled current through the transformer. However, by testing both options in the RDK-469 kit I had bought, I noticed that in this case the second option (original connection) brought out less commom mode conducted interference.

This is the reason of my question... how to choice the best connection on the layout design? (Before the tests...)

Regards.

Christos

Hi Christos,

Yes we have guidelines for us to follow so we can minimize our effort but we still have to verify/test and tweak as needed with our prototype whichever is working best on our design.  We might have good layout and y-cap connection but our transformer construction is not optimized for EMI so we will still have problems.  EMI really takes alot of test optimization from selecting values of Xcap, Ycap, CMC, Dif choke, transformer construction and Ycap connections.   We have options but we have to test whichever works best.  Even selecting output diode has EMI effect.   

Thank you again!

To finally close this topic, should you recommend some Power Integrations`s application note which conveniently approaches this specific theme (i. e., Y cap layout guidelines)?

Christos

Hi Christos,

Definitely it is recommended to follow those application notes.  You'll save iterating layout revisions.  Once you followed those layout guidelines assuming you have good transformer construction, you only needs to tweak tuning values of your filters like x-cap, y-cap, dif choke and cmc if there is.  Thanks.  

Ok, surely.

I think I haven`t been clear, sorry.

I wish you to indicate one or two application notes with Y cap layout guidelines. Would you please suggest a few of them?

Thanks.

Christos

Ok, surely.

I think I haven`t been clear, sorry.

I wish you to indicate one or two application notes with Y cap layout guidelines. Would you please suggest a few of them?

Thanks.

Christos

Teach us more in this field. After reading on here, we can learn more in this topic. 

Hi Christos,

Sorry also for confusion.  We have recommended layout guidelines for every controller that can be found on the specification.  There is also recommendations for EMI reduction as part of the specs.  

I think you want to use Innoswitch-EP?  I have the specs below and you can find layout recommendation and EMI reduction recommendations on page 16-17.  There is also explanation on Y-cap connection.    

https://ac-dc.power.com/sites/default/files/product-docs/innoswitch-ep_family_datasheet.pdf

Below link is an Application Note for EMI technique using Topswitch but it is basically the same general concept.

https://ac-dc.power.com/system/files_force/product-docs/an15.pdf

Thank you.

Hi, PI-Mallora!

Yes I`m using Innoswitch-EP!

I had already taked a look at the related guidelines in these documents and some design examples, but neither of them brings up the information I`m looking for, i. e., why some reference designs connect the Y capacitor to the power supply output return terminal and some others conect it directly to the secondary transformer pin. In other words, how to predict in the layout phase of the project which connection will be better regarding the commom mode noise emission...

So, after so many messages, I can realize that there isn`t, at least in Power Integration`s available documentation, such guidelines. Then I`ll need to virify that in the prototype tests phase. This is, in itself, a relevant information and I thank you very much for that!

Best regards.

Christos

Hi Christos,

We have general guidelines on EMI reduction as part of the specs and application notes.  Regarding the Y-cap, we can actually connect that anywhere we want it on the secondary.  But our initial consideration usually is the layout so we connect it on the most convenient and shortest possible path but it doesn't mean that it is the best connection.  We actually want to eliminate y-cap ideally for safety but due to the nature of SMPS it is really hard to pass EMI without it so we just need to minimize it.  Noisiest node varies from one design to another depending on transformer construction, layout, sync rect/diode used, single or multiple output.  That is why we really needs to go for prototype and verify which node on the secondary that is causing the common mode noise that we needs to provide a coupling path so it won't cause outside interference.  Even a well experienced design engineer can't provide 100% sure connection of y-cap, he/she still go on the same process every design.  If you got it the first time based on our initial assumption then good, if not, its always part of the process to identify the cause and provide the solution.  Thank you and sorry if I didn't provided you the answers you are expecting during the courses of our discussions.

Thank you very much again!

As I said, the absence of an "absolute" set of guidelines about my specific issue and the necessity of the prototype tests are in themselves relevant informations.

I`ll go ahead taking that in mind.

Regards.

Christos