INN2605K level 6 almost met but failed
Hello,
I've designed a 12V, 1500mA universal input power supply adapter using the INN2605K and PIXIs.
It is built and test, meets no load efficiency perfectly (0.026W at 115VAc, 0.046W at 230VAC) but the loaded efficencies are off, almost there but off. We are getting the following average efficiencies:
115VAC -> 84.3%
230VAC -> 82.77%
the required efficiency for a 18W PSU is 85% and we are overdissipating around 0.3W @ 230VAC
I can't post the schematic for confidentiality reasons but the design itself is similar to RDR-469, using the single 12V output and synchronous rectification on the secondary without Schotky diode in parallel. The transformer is as per PIXIs but we are nowhere close to the efficiency as per figure 12 for example.
The main difference I am seeing from PIXIs to RDR469 design is the transformer. PIXIs indicates a primary of 58T-1x30AWG, secondary 7T-2x25AWG whilst RDR-469 is using 55T-30AWG and 7T-23AWG. Material is PC95 TDK. I am wondering if that small difference in copper could account for the efficiency difference.
I know it is a bit of a broad question to ask but I'd appreciate any hints on where else to look at specially since we are talking about something quite similar to the reference designt. We are just talking about a small power dissipation to be gained to meet the criteria.
thank you
Comments
Hi, thanks for the reply.
I'll definitely have a look at the bias winding and ensure we are all OK.
So far we got the following efficiency numbers (universal input, 12V 1500mA output)
120V input:
25% -> 85.52%
50% -> 85.32%
75% -> 84.89%
100% -> 84.49%
average 85.06 / passed
230V input:
25% -> 82.05%
50% -> 85.25%
75% -> 84.89%
100% -> 84.56%
average 84.19 / failed
the transformer, as calculated with pixis is (in winding order):
screen1: 14T 2x30AWG
primary: 58T, 1x30AWG
screen2: 6T, 4x28AWG
bias: 6T. 2x25AWG
secondary: 7T, 2x25AWG triple insulated
please note that the power supply is in a plastic box with approx a 4ft output wire and the test house is including it inside their measurement so any external losses on that cable and it's connection to the pcb will affect the efficiency, specially at higher powers. They also include the mains cable and whatever cabling they use between the power meter and our power supply.
I'd have expected everything measure on the pcb terminals to calculate the real efficiency of the supply but that doesn't seem to be the case.
thank you!
EDIT, the difference in effiiciency from the first post is due to having changed the output capacitor from low ESR to solid polymer. Rest, including EMI filters, MOS and snubber are as per the application note.
Hi Santiall,
From the data I see that the efficiency at high line is much lower at 25% as compared to low line. Could you please tell me the drain current value at 25% load condition at both high line and low line and also at full load condition. Drain waveforms would be more helpful to know if it is operating in CCM or DCM.
PI-AP
Hi,
all has been checked and since I was't finding anything fundamentally wrong I requested a description of the test setup to the test house. It came out that they were indeed having a very lossy setup and their measurements were quite off. After addressing the issues we were having actual efficiencies between 87% and 91%, in line with what was expected.
Sorry for the bit of red herring but still all the help has been very appreciated.
Hi Santiall,
Good to know that everything is passing as expected!
PI-AP
Hi Santiall,
Efficieny is significantly impacted by transformer design. The leakage inducatance and the wire gauge contribute significantly. The Rds ON of the SRFET also contiribute in the losses. The primary side clamp sizing can also impact the losses. The SRFET snubber can also impact but not significantly. If you tell me at what load % (out of 100%, 75%, 50%, 25%, 10% ) if the efficiency is lower than needed then we could think if the bias winding voltage/current is enough or not to sustain the BPP votlage at the desired value. If the BPP voltage falls below the needed value especially at light load conditions, then the internal tap of the IC turns ON to charge the BPP capacitor which increases losses, we ideally want to prevent this situation.
PI-AP