LNK6778E blows at power-off power ON with design based on DER-453

Hi Jean,

Thank you very much for using PI products particularly LNK6778E. We understand that your design was based on DER-453 with some modifications to meet your specific need/s. Based on the waveform, we can definitely see that the drain voltage is too high causing some failure. However, as to what is directly causing the failure cannot be determined yet since there are still some information needed and further investigation must be conducted. If it is snubber or other factor is yet to be determined. One obvious difference is that you are using syn rects instead of secondary diode. What I can suggest is that you may try to investigate on this area first, making sure that the sync rect doesn't turn on instantly while the primary mosfet is still conducting when doing sudden AC input turn off. If not, using a diode for the secondary will also be a starting point or a quick check to verify if such issue occurs as well. Again, we appreciate you for using LNK6778E and feel free always to send us questions and inquiries.

Thanks for the answer.

Yesterday, I made some measurements with the rectifying  MOSFET replaced by MR852 diode and monitoring both drain votage and rectifier gate signal. I made several power cycles and didn't see major problem:

-during power-up the drain voltage increases with spike up to around 670V

-the gate signal of the rectifying controller seems always at the right time

Do you think that a possible cause could be that, sometimes, the spike on the rectifying transistor are over 200V => transistor dies in short circuit => spike over 725V on drain?
I have attached scope capture during start-up. In yellow:drain; blue voltage on the rectifying diode; green: gate drive signal
Regards,
Jean

Hello,

I have isolated the problem. It occurs when the LNK switcher changes its operating frequency (from around 30kHz to around 110kHz in the attached screenshots). In this case, the rectifying MOSFET is still ON when the LNK turn-on for the new cycle and we can see that in this case the drain voltage reach 788V. Is it possible to prevent the LNK to changes so suddenly of frequency? If not, do you have an idea how to overcome this problem?

I could perhaps change the rectifier setting to get ON time 2.3µs smaller in the present case to get the MOSFET OFF even the lNK change to 136kHz. But it means reducing MOSFET ON time by 1/3, loosing most of the advantage of synchronous rectifier. Moreover, this dirty workaround will not work if the last LNK on time before changing frequency is smaller than 2.4µs.

Best regards,

Jean

Hi Jean,

Again, thank you very much for using PI product. Looking at the waveform it is very clear that this time the maximum drain voltage is not being exceeded. The issue seems gone when using a diode instead of a MOSFET right? Again, it is highly probable that the timing for the MOSFET switching is the one causing some problem. It will be a good idea if the timings can be verified first in such a way that the rectifiying MOSFET will not interrupt when the primary is at ON stage as well. If it is, probably some delay is needed to ensure that there will be no damage during switching transitions. Thank you very much.

Hello,

Did you also see my scope captures of the 16th (they are higher inn the thread since I re-reply to your first answer)? In these captures, we can see more clearly the problem. In fact the rectifier controller is a predictive one. It computes the energy stored during the primary ON and keep the rectifying MOSFET ON to empty this energy. But when the linkswitch suddenly changes its frequency, it re-load energy before than the energy of the previous cycle is fully drained.

I made some tries with the rectifying controller to switch OFF around 30% sooner (it is the maximum). With this setting , I didn't see problem any more. But, I see two problem with this solution:

-the efficiency will be lower

-problems could perhaps still occurs if the link switch changes its frequency even faster

Is there a way to limit the cycle to cycle maximum variation of the link switch or at least to compute the maximum variation?

Best regards,

Jean

Hi Jean,

Good day. We were able to see the waveforms however we are not sure what are the other channels are for.  We are assuming that channel 1 is the primary VDS waveform. It would be better if the specified channels are labeled properly. Now, the LNKSwitch is an adjustable frequency oscillator type of control that varies according to the load (switching frequency is inversely proportional to the load) therefore it will be impossible to limit such variation. For the maximum variation kindly refer to the PIXls design program provided for the PI products. Below is the link for the PIXls design program:

http://piexpertweblab.powerint.com/site/login

Thank you very much.