Non Monotonic Issue during Powering up using LNK6767V at output of 1.5A 15V and input of 90Vac

Posted by: Png Kok Khuan on 11/19/2013

Hi PI,

As shown in the attached waveforms, the output voltages - '+15V', '-15V' rise up not monotonically. It is related to the dip of primary bulk voltage. When the input voltage is increased from 90Vac to 100Vac, this issue disappears.

I don't want to increase the capacitance of current bulk capacitor which is 47uF.

Tried to increase RPD from 23.2kOhm to 120kOhm and decrease RFB1 from 51.1kOhm to 43kOhm but do not help.

Is there any way to solve this by adjusting some components value on this design?

Thank you.

Regards,

Comments

47uF capacitor at input is too low, we suggest using capcitor with capacitance (uF) 3 times of output power. For your application, that means the input cap should be around 70uF.

Another possible solutions is improve the control loop. PLS upload your schematic, so you and me will be in the same picture. It is worth to try although it may not work.

Regards

PI is using 68uF for 30W output power in the Reference Design Report for a 30 W Single Output Flyback Converter Using LinkSwitchTM-HP LNK6766E. The capacitance used is not 3 times of output power. Does this reference design shows the non monotonic issue I met?

By the way, how to keep the schematic attached to you as confidential?

Because this document is 'Agilent Restricted'.

Thank you.

Regards

You are right. The 30W RDK board uses 68uF cap to handle 30W output, and the board has no start up issue. Maybe this issue could be solved with higher Vor transformer. Could you redesign your transformer and make sure the Vor is about same as the 30W RDK board? (Vor=(Vo+Vdiode)*Np/Ns).

For the schematic, could you send me the portion of the secondary side? Then you do not have to worry about the confidential issue.

Thanks

For PI 30W reference design, Np/Ns = 48/6 = 8. While for my design, Np/Ns = 7.

For rough calculcation, Vor of PI 30W Reference Design = (12+0.58)*8= 100.64V while Vor for my design = (15+0.6)*7=109.2V.

Any theory that supports higher Vor can solve this issue?

The schematic for the 2ndary side is attached.

I measured the Ripple&Noise and found that it does not meet my requirement which is 50mVpp at 1.5A total output load. Three Ripple Noise waveforms are attached for your reference and analysis.

The Ripple frequency measured is around 250Hz. Why this PI Controller can create such a freqeuncy of ripple?

Thank you.

Regards,

Hi PI,

Are you investigating on the issues mentioned?

Should I wait for your answer?

Thank you.

Regards

Sorry for responsing late. I was on vaction for the last two weeks.

The 250Hz ripple is casued by the frequency jitter, which is important for EMI solution.

For the same current limit, higher Vor means more power can be delivered to the secondary during the flyback time. That is why I thought higher Vor can make some difference. But it could be wrong, becasue higher Vor always means higher duty cycle. But anyway, you may have to try different transformer to solve your problem, since you donot want to pay more money for bigger input capacitor.

I can not find anything I need in your schematic of secondary. But to solve the monotonically issue, faster loop maybe a solution. Try some phase boost circiut on the feedback divider and on the resistor which is connected between your error ampifier and the optocoupler (this resistor is used to limit the current through the optocoupler).

Regards