600vdc to 5vdc - less than 1W requirement

Input voltages as high as yours arn't officially supported in our PI Expert design software. The reason is fairly simple: we use our own proprietary MOSFET that is integrated into the controller IC. Most of our MOSFETs are rated at 650-700V. When you take the 600VDC that is applied to the MOSFET and then add the reflected output voltage of your design, the sum of the two voltages will most likely be higher than the break-down voltage of the MOSFET.


Not to fear though....we have a work around for you!


The work around is a technology we developed called Stack-FET. The Stack-FET technique employs an additional MOSFET located above the drain connection of our controller IC. The added FET dissipates the additional voltage in the design and protects our MOSFET and controller from the high input voltages.


For a good description of the technology, read this:
http://www.powerint.com/en/community/papers-circuit-ideas-puzzlers/circuit-ideas/-high-voltage-input-switching-power-supply-usi


Because Stack-FET is not a feature directly supported by our PI Expert software, you will have to do some workarounds to have the software help you with your design. This will require you to work with PI XLS instead of PI Expert.


The basic steps are this:
-Pick an arbitrarily large input capacitance (99999999999uF)
-Choose an AC input voltage that has a peak voltage close to the DC voltage you want to design for.
-Iterate your design as you would normally in PI XLS.
-Ignore the red warnings about the drain voltage of the device being exceeded.
-Use this PI XLS design to build your schematic....but make sure to add in the Stack-FET circuitry from the link I posted above.


The one major downside of the Stack-FET approach is that you're going to suffer a drop in efficiency. The additional MOSFET is going to an extra source of power loss. If you're careful with your design and keep the reflected voltage low enough, you can keep these losses to a minimum. It will also help if you can design for a narrow input voltage range. A narrow input voltage range will help optimize the design for one specific application and it will be easier to fine tune for minimizing losses.


I hope this has been helpful. I've attached a very quick design in PI XLS to help get you started. You'll need to optimize and tweak it a little bit to meet your final requirements...but it's a good starting point.

-The Traveler

Thanks Traveller

That indeed is a good starting point although I will need some time to get used to PIxls.

One doubt ... abt the decrease in efficiency ... I understand the MOSFET will lead to a decrease in efficiency but wont the zeners VR1 to VR3 in the StackFET design contribute as well to the losses or will they be really insignificant
http://www.powerint.com/en/community/papers-circuit-ideas-puzzlers/circuit-ideas/-high-voltage-input-switching-power-supply-usi

Quote "If you're careful with your design and keep the reflected voltage low enough, you can keep these losses to a minimum. It will also help if you can design for a narrow input voltage range. A narrow input voltage range will help optimize the design for one specific application and it will be easier to fine tune for minimizing losses."
For the above points any pointer to literature to understand and reduce those losses would be highly appreciated

Thanks & Regards
PK

Ideally, you want VR1-VR3 not to be conducting. Their purpose is to ensure that the drain voltage on the PI part does not exceed the BVDSS of the internal MOSFET. If you can design your power supply with a small reflected output voltage, the voltage spike generated after the MOSFET turns off will be kept as small as possible, leading to less losses in the primary clamp circuitry.


I don't know of any available literature to will explain this in better detail. However, from a practical standpoint, it should make sense. If you have a power supply design with a very wide input voltage range, you need to ensure that at your lowest input voltage, the transformer can supply enough power to the secondary. This will require some minimum number of primary/secondary turns ratio.


When the MOSFET of a flyback power supply turns off, the secondary winding is conducting. The voltage across the secondary winding will then get reflected to the primary side (typical transformer functionality) multiplied by the turns ratio.


So, if you design has a very wide input voltage range, your lowest input voltage will set the turns ratio to ensure that the transformer can supply adequate voltage/power to the secondary. The reflected voltage during secondary conduction time still applies...but it is added onto the small input voltage...not really a problem. However, when you operate at higher input voltages, your turns ratio is fixed, which means your reflected output voltage is fixed. The MOSFET will "see" the power supply input voltage + the reflected output voltage at the drain node every time the MOSFET turns off. If the input voltage combined with the reflected output voltage is higher than BVDSS of the MOSFET....BOOM!


This is how minimizing your input voltage range can be beneficial. You can optimize your primary/secondary turns ratio for a narrower input voltage range which gives you better control over how much peak voltage appears across the MOSFET during turn-off.


I hope that helps! Let me know if you have any other questions.

-The Traveler

Thanks Traveller

There are few more points I would like to discuss.

Lets say I have a small input range from 500 to 600Vdc. Since my output voltage is 5V
I will always be in step down mode. Lets say I have to choose between a turns ratio of
20:1 vs 30:1
The 20:1 will give me less losses in the MOSFET but more sec voltage around 600/20 = 30V
The 30: 1 will give me less secondary voltage around 600/30 = 20V.
Does getting 30V at sec instead of 20V affect my efficiency on the secondary side ?

Or rather the question is what are the competing parameters against which I have to optimise

Also any special reason why Link Switch II was used in your sample PIXLS instead  of others like LP, XT.
I mean what is the choice criteria. I need a tight regulation should should I prefer a CV,XT or LP

Regards

PK

The choice of IC was rather quick just so that I could put together a quick spread sheet design to go along with the basic description of how to do a StackFET design.

As far as our products go:

LinkSwitch-LP has fairly loose CV/CC tolerances.  If you need very tight voltage regulation, this wouldn't be a good choice.

LinkSwtich-XT and TN have a fairly simple feedback control technique that works well in many situations but might not be ideally suited to this application.

LinkSwitch-CV is very similar to LinkSwitch-II but without the CC mode control.

Another reason I chose LinkSwitch-II is that when properly configured, you can design your power supply for very low no-load input power.  Your use case is outside the typical use case encountered for LinkSwitch-II but you could still likely configure it for very low no-load consumption.  For exampled, we have several refence designs using LinkSwitch-II that have sub-30mW no-load input power consumptions.

Regarding efficiency, on the secondary side, your losses are going to be dominated by diode conduction losses.  So keeping the diode current low will help reduce losses, paralleling output diodes can help reduce losses as does using an output rectifier with a very low forward voltage.

How tightly controlled to you expect the input voltage to be in your design?  Is it really going to be 500-600 volts?  The reason I ask is becuase if it's tightly controlled and you can keep your reflected output voltage very small, maybe you could get around the StackFET reuirement (not likely...but possible).

-The Traveler

Before I write further I should first thank U and PI for having such a wonderful forum support.

it becomes quite difficult when you have a non regular requirement.

On to the comments

Yes the input is going to be 500-600Vdc. The output even when a modest 5 ... will reflect in primary as 100V when I use 20 turns ... the upper limit for Vds touched (600+100)... not even considering the snubber overshoot yet ... so I believe not using StackFET is almost ruled out ....

... Unless we bring the turns ratio still further and that brings me back to my question ... what is stopping me from reducing my turns ratio ... the optimisation question ... I know reducing my turns ratio would increase my secondary voltage but what is the limiting factor.

As far as my output regulation is concerned ... I need quite tight regulation ... I am actually planning to use a linear regulator to get the required regulation ... not sure how bad that would kill my efficiency ... have to still choose components there ... any inputs highly appreciated

And yes low no-load input power matters a lot ... as per my reading link Zero are more suited for them ... but LinkSwitch II might be fine as well.

 Looking forward to your inputs

Regards

PK

Using PI XLS or PI Expert, you don't have direct control over the primary to secondary turns ratio.  What you have control over is specifying the reflected output voltage you would like in your design.  

The LinkZero product family is indeed another option for you.  One thing to keep in mind with LinkZero products (LinkSwitch-II as well for that matter) is that as load levels decrease, the output voltage tends to not get sampled as frequently.  This will display itself as a rise in output voltage at very light and no-load conditions.  I'm not sure if this is a problem for your application but it's somthing to keep in mind.

If you require very tight regulation of your output, using a linear regulator is definitely an option.   With linear regulators, you will need to create your power supply design for a voltage slightly above the output voltage you want.  Linear regulators require some "head room" in that their input voltage needs to be larger than their output voltage.  With linear regulators, you will take an efficiency hit becuase of this head room.  The power dissipated in your linear regulator will be approximately (PSU-Vout - LinReg-Vout)  x Iout.  How much headroom you design will have will be a combination of personal preference, recommendations from the linear regulator manufacturer as well as the results of your design verification and evaluation.

Back to the turns ratio issue.  To minimize losses in your Stack-FET configuration and clamp circuitry, you will want to keep your reflected output voltage low.  But you'll need to experiment/iterate/fine-tune the PIXLS design.  Using a really low VOR will cause some other practical problems in your design (practical transformer gap sizes, practical number of winding turns, etc).

I would suggest that you start by getting familiar with PI XLS.  If you get stuck, feel free to follow up with another question.  If your questions end up being more PI XLS related, we also have a PI Expert forum that is run by my manager.  He also happens to be the person that designed all the decision making algorithms used in the software.  So his knowledge about how to work around certain limitations of the software is much better than mine.

-The Traveler

Linkswitch II and CV designs show low primary inductance  in PIXLS for output less than 1.5W

A quick search on reference designs 

http://www.powerint.com/en/design-support/reference-designs/design-examples

and sorting with respect to power tells me that TN and XT are preferred at such low powers. Assuming that I will have a linear/switching regulator after the design

My doubts

1. Does this allow me to use them without worrying much about the regulation for isolated power supplies ?

2.The reference designs dont seem to have low no-load power consumption. Is it possible.

3. Can I use CV even at lower power supplies like 1.5W

I'm not completely understanding your questions...

1.) I'm not 100% sure what you're asking.  In general, if you're doing some kind of secondary post-regulation of the power supply output, the load/line regulation of the powersupply becomes less critical but it is still important.  Depending on the device and configuation, poor regulation could put the device into auto-restart unneccessarily.

2.) Is what possible?

3.) Yes you can use LinkSwitch-CV for lower power designs.

-The Traveler