Hiper Repair

The FBP voltage seems too high. I would replace the part to see if the power supply begins to operate. Shorting the Vcomp to either ground pin should not damage the part. However if it is shorted to a high voltage source, then it will be damaged. If either Q10 or Q11 was damaged, it usually applies B+ to the gate driver which will damage the part.

Z. Cochrane

I replaced the chip and fixed a few other problems.
Still no switching.
FBP is 0.9 V,
GATEH is 12 V
all powers are at 12V,
HB is at 12 V,
ISP is at 0.8V,
VREF is at 3.3,
GATEP is at 12 V,
FBL is at 3.2V,
FMAX is at .8V,
remainder of pins are at ground.

The FBL voltage seems wrong.

I agree that 3.2 Volts on FBL is wrong. Replace U7 (the transistor may be shorted). Also ohm out D16 and R63 and check for solder bridges around this circuit. You may want to replace D16 just to make sure that it is OK.

Z. Cochrane

I found a bad resistor and ISP is now 0.0v. I lifted D16 to see if that allowed switching. But FBL is still 3.2 v and no switching.
I have not connected the PFC and LLC Fets.
With the voltages I am seeing and the FETs disconnected should I see switching?
Since LLC is disabled because FBP is 0.9V would FBL be normally 3.2V.
Should I be seeing PFC switching with the voltages I am measuring?

I talked to the designer of the board and he said that during start-up FBL should be 3.2 Volts. The pin is connected internally to the reference at start-up. If GATEP pin is not switching and is at 12 V then you need to check that Bridge+ and Brideg- voltage is present. If so, then check Q1, Q3 and Q2. Check to see if Vcc is present. If not you need to check U4 to see if it is operating.

Z. Cochrane

Bridge + and - are present at 160V. I have conected Q1 and Q2 and Q3 and they work but since GateP just goes to +12 Q2 turns on and blows the fuse since GateP is not switching. Should I see a switching waveform at GateP if I do not have Q2 connected.

GateP will stay at 12 Volts until it reaches the current limit threshold. It sounds like either the current sense signal is not getting to the ISP pin or Q2 is shorted or U6 is bad. The current sense resistors are R6 and R8. Verify that R6 and R8 are not shorted. Verify that you have continuity from R6 & R8 to R45. Verify R45 is OK. Verify that D3 and D4 are OK.
ISP current limit threshold is -0.5 Volt.

Z. Cochrane

I have 24 V and 12 V out now but Q10 and Q11 are very hot even with no load.
I have substituted the FET used for Q2 for Q10 and Q11.
I am ordering IRFIB5N50 to use in the future.
Will substituting the FETs result in over heating.
Here is the GATEL and GATEH waveform.
It looks like GATEL is turning on before GATEH turns off.
Then normal deadtime when GATEH turns on.
The scope scale is off by a factor of 10 due to the probes.

The SPP21N50 has about 2.5 times the input capacitance of the IRFIB50N50. This may cause a turn off delay that can cause both Q10 and Q11 to conduct. Let me know if the new replacement parts fix the problem.

Z. Cochrane

I wll replace the FET.
But I am curous about the waveform.
Gate L goes low about 300 ns before Gate H goes high which agrees with deadtime of .062/Fmax(200kHZ).
However, GateL starts going high about 100 ns before Gate H goes low.
Regardless of fall and rise time delays due to FET gate capacitance shouldn't the start of GATEL rise before the start of GateH fall be be the same deadtime as seen in GateL going low before GateH goes high.
Could I have damaged a component that would result in an asymmetrical deadtime?

I calculated values for R52,49,51 and 53 as I noted they varied a lot between older datasheets and the reference design.
An-46 states FMax should be 110 Khz and F min - 66KHZ.
I followed PLC810PG Rev. E 5/09 page 13. I got R52 - 39.2K,R49 - 33K, R51 - 41.2 K and and R53 - 56.2K using value we have here. My dead times look reasonable now but I am in some kind of burst mode. Are my values correct for the resistors?

The reason that the power supply goes into burst mode is that the transformer is designed for a Fmax of 230 kHz. If you reprogrammed the device to operate at 110 kHz, it can't deliver the power. I would suggest that you go back to the original configuration. Lets get that to work properly and then make any modifications if necessary.

As far as the timing of GATEH and GATEL, the devices internal logic prevents a period that both are on. The only thing that I can think of from your observation is that either the scope probes have a different delay (using a differential scope probe on the high side and a standard scope probe on the low side) or the additional capacitance of the replacement FETs may skew the timing. It is important to replace the half bridge FETs with the original or at least similar devices.

Best regards,

Z. Cochrane

Ok, the FETs should be here tomorrow.

The FETS resolved the deadtime problem.
When I apply a 4 A load on the 24 V the voltage drops to 21 V, when I increase the load to 8A the voltage remains at 21 V.
Open circuit the voltage is 24V.
Nothing seems to be over heating.
The spec gives a 22 V min, is 21 normal at full load?

Since the 24 V and 12 V outputs are fed back to the error amplifier, the 12 Volt output must have a minimum of 10% of full load to meet the specification.

Z. Cochrane

Things are working good.
Now I am verifying our vendors LLC transformer.
It seems to have too low leakage inductance.
I removed the LLC transformer on the dev board and measured it.
I get 700 uH primary inductance and 200 uH leakage inductance.
This has the right ratio but the absolute value is twice that listed in RDR-189. I am using a 100 khz square wave across pin 5 and 6 and measuring the current with a TCP202 current probe, then using L di/dt = V to solve for L.
Can you explain the discrepancy ?

I used a sine wave and the numbers are good.

When my AC 400 HZ source sags the GATEP stays high and the AC current peaks.
Is this mormal? Attachesd are a normal trace of: Yellow GateP, blue ISP and Greemn AC input current. There is not 24 or 12 V load, if there is a Load I get the same effevcft or with a 60 HZ source.

Does the power supply seem to work normally?

Other then the input AC being so high, GateP being stuck on and V bulk at about 150 volts. The output voltages are normal.

Is this mode of operation anything I should be concerned about?

The PLC810's algorithm will allow GATEP to hit 100% duty cycle near the zero crossings of the AC voltage.

Will the ISP current limit keep 100% duty cycle GATEP from blowing the fuse?

Of course. The -0.5 V current limit setpoint on the ISP pin is always active.

I have got a LLC transformer from my vendor and I inserted it in the dev board.
I modified a few component values for my output voltage. The vendor did not use litz wire. They gave me some reason for that. From the spreadsheet it seems litz wire is required because the losses are so high with single strand wire, is that correct.

Correct.

Can you tell me your new transformer's:

Primary open circuit inductance.
Primary inductance with secondaries shorted.
Primary and secondary turns.

open circuit I 117.8 uH
shorted secondary I 22 uH

primary turns 10
secondary turns 6 and 6 center tap.

I am attaching my spradsheet and a scan of the dev board tdk transfomer in my circuit and the vendor's transfomer secondary output current in one phase.

For what power level and output voltage is this?

160 V 2A. I am attaching a corrected spreadsheet with the measured inductance of the vendor's transformer.

Your transformer does not have enough leakage nor open circuit inductance.

You will need around 85 uH leakage inductance for 100 kHz opersion or around 65 uH for 132 kHz operation. You will need to double all the turns for 100 KHz operation.

WHy didn't the spreadshet give me a warning. Did I enter some incorrect values?

Line 108, fnominal_actual, tells you that with your transformer specs it will run at 198 kHz. The recommended max frequency is 132 kHz.

If you leave the input values for Lpar, Lser, and C blank, the spreadsheet will give you starting values for them; you will see that the recommended starting value for Lser will be much more than 17 uH.

I get 211 uH, 52.7 Lser. Does that sound correct?

Also 12 turns primary and 10 turns secondary.

So with 12T primary and 10T+10T secondary you get
Lopen = 211 uH
and
Lshort = 52.7 uH ?

Oh and what is your core center leg cross sectional area?

Yes and Fnom =95.6 kHZ>

2.1 cm2

A core with 2.1 cm^2 cross sectional area is likely too small for 320W, unless you have forced air cooling, or if you add a supplemental external series resonating inductor. You are usually better off (cost wise) with a larger, integrated transformer than a small transformer and external choke.

What is the winding window area for the primary and the secondary?

Pls. try

Npri = 14 T
Nsec = 10 + 10T
primary open circuit inductance = 300 uH
This should give you
Lser = 72 uH

If you use C = 33 nF
you will get
fser = 103 kHz
fnom = 100 khz

For a high voltage output you will be using PN output diodes and thus you will want to operate slightly below resonance in order to get rid of diode reverse recovery losses.

However you BAC with 2.1 cm^2 core area will be 3500 gauss which is extremely high; you will need to find some core material that has very low flux loss at 100 kHz. I think you will need to find a larger core.