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Higher Input voltage

Posted by: MMC on

PI support,

How can I increase allowed input voltage in DI-138? Can I use StackFET
as done in DER-58? The reason I want to use DI-138 arrangement is to get
rid of the transformer (no isolation is OK).

Thank you,
Victor

Comments

Submitted by Tim Starr on 01/30/2009
Hello,

Yes I believe it is possible to cascode another MOSFET with the LNK-TN to achieve a higher breakdown voltage. We do not have expertise in this exact configuration you would be much on your own.

How high an input voltage do you desire? Since this is a buck converter you can use quite a high input voltage by using input capacitors in series, and properly rated input diodes you could probably use an input of up to 650 VDC given that the LNK-TN's internal MOSFET is rated at 700 V.

This is different than in a flyback where you have to factor in the reflected output voltage on top of the input voltage and allow for enough margin for the worst case leakage spike.

Good luck with your design!

Submitted by MMC on 01/30/2009
I need DC input up to 900V. Capacitors is not a problem, I can connect 2 or more in series with equalizing resistors. Problem is LNK internal MOSFET's 700V rating. Since PI does not make any switches with higher rating, cascode StackFET connection seem to be the only way to increase input voltage. So what options do I have with ANY PI product if I don't want to use a transformer to avoid adding reflected voltage (but just an inductor for buck topology would be OK)? Victor
Hi Victor,

Could you please provide a complete specification including output voltage and current and any other important details you have? The output voltage is of special importance since it, along with the input voltage, will dictate the minimum duty cycle in a buck converter, D = Vout/Vin .

If your output voltage is low, say 12 V, then Dmin = 12 V / 900 V = 0.013 . For a device like LNK-TN with a switching frequency of 66 kHz and a minimum on-time ranging from 280 ns to 675 ns this 0.013% duty cycle would be under 200 ns, which is less than the device's minimum on-time.

For our other devices the "minimum on-time" would be dictated by the leading edge blanking time (tLEB) plus the currnet limit delay (tILD) plus the rise and fall time of the switch.

For certain designs the buck topology will work but the flyback topology has the advantage of allowing a very wide range of input voltages.

I hope this helps! Good luck and let me know your specs.