18-265V AC-DC SMPS design

Your design should be ok. However only concern is the current limit overshoot at high line... I already answered this post in some more detail in the PI Expert forum. See the following thread
http://www.powerint.com/en/forum/pi-expert-support/transformer-design

Hi Spock. i have read your both replies but there is some points that i dont understand. What kind a fiter do u suggest for input and output. PI Designer uses inductance and capacitor pi filter but i cant calculate the exact design paramaters with PIXl's

PIXls does not suggest the input and output EMI filters...
For 3 W supply I'd suggest you use a "pi" filter at the input much the ame as the one used in DI152. Although it is only 3 W I suggest you still keep a total capacitance high to maximize your DC bus voltage at low line. 2 4.7 uF caps and 1 mH inductor should be ok.
I am not sure as to what your output ripple requirement is... I'd suggest that you build the prototype and if the output ripple is acceptable you dont need a post filter otherwise you can try an LC filter at the output (2.2 uH or 3.3 uH and 100 uF as a starting point)

at my spreadsheet Cin capacitor is one 150uF and it is too high than yours advice. Are two 4.7uF capacitors enough at Vacmin? I ll try your output EMI fiter suggest and feedback here again.

The bottomline is that you need to have stable DC bus at low line. There will come a point where the marginal benefit of a larger capacitor is not that significant. For DI152 we found that CIN = 9.4 was good enough... you just have to build and test for yourself to make sure that the DC bus does not fall below 25 V or so under any circumstances.
You want the minimum DC buc voltage to be greater than the VOR (20 V in your case)

Hi again; At last i have finalized the design. PIXl's doesn't warn me about ee13 core size. i have to use smallest transformer core as possible but i'm not u sure that 1 primary, 3 secondary outputs and shiled can fit into ee13 core. if this is possible i ll prepared a transformer sample. so i need your kindly opnions again. Thanks for everything.

It is highly unlikely that the 3 windings will fit on a EE13. for a multiple out supply try a long core like the EEL16 or EEL19. You can also reduce number of turns from 17 to 15 or 14. That will bring up the flux density somewhat but currently you are at 880 Gauss. You should target this value to be around 2500 Gauss. Also maintain your gap length above 0.1 mm for manufactureability.

hi Spock; I have increased the core size to the EEL16 but CMA paramater has inreased too. It is above 3000 with 14 turns and BM is approximately 1000 Gauss. Is CMA parameter causes a major problem for design? The design came close to congestion point because of dimension limitations but i have few design ideas too. I need 3 isolated outputs but i can reduce output count to 2 with a dc-dc converter. Maybe ee16 core can be suitable for 2 outputs? Thanks again.

No. Too low a CMA indicates that your wires are undersized and that usually indicates that you will have an overheating (thermal) issue. Too large a CMA means your wires are oversized, and it just indicates that you can get away with smaller wire gauge (cheaper and also more compact) In many cases you can reduce the number of winding layers too which is better for low leakage and proximity losses.
Anyhow, in your case, you can reduce secondary turns some more . This will increase flux density but improve the fit (congestion) of the transformer.

Hi again;

i have tried this design and it is working good at high voltages such as 230V but at low input voltage and full load condition, output begins to fall below 5V.

i thing input capacitances must be bigger than or equal to 150uF?
otherwise half wave rectifier cant supply the required energy at negative side of 50Hz sin wave. if i'm wrong please warn me.

Yes I did'nt realize that you were using half wave rectification - This will certainly require bigger caps... Better to go full wave in my opinion if you have the space.
Also, power delivery at low line may also suggest that you have inadequete inductance, which can be a result of inaccurate estimate of efficiency in the spreadsheet.

maybe i can use bigger caps or try to implement full wave rectification.
on the other hand i noticed another design failure.

at feedback circuit zener diode's voltage is 4.3v so 0.7v remains to optocoupler's led, but if u check the pc817 datasheet u can see that optocoupler led's actual forvard voltage is typicaly 1.2v.
because of this mismatch output reaches 6.1V.

i calculated the zener diode voltage as 3.6v. So i use 3.3v zener but it still exceed 5v. icant find exact reason of this

Is this observation made at no load?
Try reducing the biassing resistor (R3) for the zener diode... Maybe the zener is starving for bias current.

its not matter that no load or full load. when input voltage is high enough to start up smps so output is aproximately 6.1V.

i alredy reduced zener's current limitor resistor to 100ohm but result is same

Thats odd. Can you post your schematic?

i use same schematic at DI-152 with one difference.
at output side i use post filter (pi filter).

i have redesigned the circuit for full wave rectification and attached the schematic pdf.

i have found chance to try it rapidly but its not working well.
question is constanst current source is still feeded with half wave rectification?

maybe current source feeded by output of full wave rectifier but i dont know that cause a problem because it is dc.