Top256YN bad cross regulation on multiple output design
I have attempted to create a flyback design with multiple outputs each with a unique ground. One of the main issues I'm facing is when there are strong step loads on either secondary winding and then removed, I can read as much as 33V on my 24V rail. The 12V rail stays nicely regulated. Is this to be expected? I figured there would be some amount of voltage fluctuation on the non regulated rail but not this much. I didn't see an options PI Expert about some sort of cross regulation scheme. AN-43 has a quick blurb about cross regulation with a couple extra resistors and a zener however it doesn't go into very much detail. Am I going down the right path in thinking I need some sort of cross regulation, or could there be something else throwing off my design?
As for the basics, the design boots up just fine with full load on low line (85V - Actually the supply starts as low as 70VAC fully loaded) and all the way through max voltage (265V). The outputs have less than 75mV ripple ( 20Mhz BW limit, using tip and barrel method with a 0.1uF capacitor solder directly across the probing point). There is significant HF switching noise on the outputs ~ 1Vpp in some cases. The current through the drain pin has perfectly linear ramps. The initial current spikes are faster than 220ns so the lead edge blank time takes care of the low line spikes. The drain pin never sees more than 550V with max load/high line with repetitive cold start. The primary inductance was measured at 444uH with a DER-5000 set to 100KHz, and double checked measuring 25%/75% di ratio and average bus voltage across the input capacitor. Leakage inductance was measured around 8uH.
I will say one thing I do find odd about the design is that it only ever operates at or near the 132KHz range when the input is at low line (~85VAC) with a fully loaded output. From there, the frequency just reduces as the input voltage goes up or if the load goes down. The odd part is that the switching freg can go lower than 66KHz.. For reference I have the F pin directly connected to the Source pin.
I am by no means an expert at flyback designs so bear with me :). I am happy to provide any scope capture or picture of the setup as requested.
Thanks so much for any help in advance!
|첨부 파일||파일 크기|
|Bias winding voltage on channel 2, ~13.65V (15V target), No output load||66.38 KB|
|10ms pulse, 1A static, 1.5A additional dynamic||67.7 KB|
|10ms pulse, 250mA static, 250mA additional dynamic||82.87 KB|
|500ms pulse, 250mA static, 250mA additional dynamic||85.98 KB|