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Increase slow-start time, or delay start time of TOP255Y

Posted by: scs2016 on Fri, 04/16/2021

Hi all. My TOP255Y based power supply powers circuitry that contains flip/flop latches and is susceptible to intermittent input AC fluctuations which would cause the flip flops to latch up. I've incorporated delays, etc to mitigate, but I would like to address this issue by incorporating a delayed, or increased slow-start of the power supply itself. Are there any ideas that would allow a delay or slow start up on the order of a 1 - 3 seconds?

Thank you!

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Submitted by scs2016 on Sun, 04/18/2021

Update: I've incorporated a delay circuit (see attached) to act on the "M" pin of the TOP255 G package. This should delay the startup by a few seconds, depending on the timing of resistors and C49. Welcome any thoughts or comments.

Attachment Size
Delay Start.jpg 528.4 KB
Submitted by PI-csbabu on Sun, 04/18/2021


Its interesting, do you able to test the additional circuit on the M-pin? At first 1-3sec soft-start duration is too large. Few milliseconds of soft-start can be achieved by connecting a capacitor across the TL431 regulator. Please share full schematic.

Submitted by scs2016 on Sun, 04/18/2021

Hi thanks for replying. I have not built the circuit yet, hoping there is an easier way. But taking advantage of the remote on/off feature seemed straightforward. I did however simulate the simple delay circuit. See attached results in jpeg. The full schematic is attached as well. Note I am creating two rails, one pos and one negative, and regulating off of the positive one. I post-regulate the negative rail since it fluctuates with the loading. There is also a 15 V regulator to produce rails for op amps, etc (the 18 V is used to power another HV switcher). The idea of using the capacitor around the TL431 is intriguing and I will look into it. I would like to get at least 1 - 2 seconds of delay to guard against possible intermittent AC input which could latch the digital circuitry (flip flops) in the rest of the circuit (not shown). Also included is the layout in jpeg form.

Attachment Size
HVPS_REDUX S3.pdf 122.87 KB
LAYOUT.jpg 181.19 KB
Submitted by PI-csbabu on Mon, 04/19/2021

Hi Sc,
We didn't tested the proposed circuit on our side . Most of the time customers need slow startup time (ms)/rise in output , to address the output voltage overshoot issue. I am little confused about your requirement. Does the flip-flop latch issue is related to power line disturbance or early availability of output voltage? If you are looking for late turn-on of unit and you have some triggering conditions, use remote on/off circuit to disable/enable output voltage.

Hello. This is not related to any start overshoot or other transient conditions on the supply itself, but how other circuitry powered by this supply will operate. There are comparators that trigger digital latches in the circuitry. If the supply voltage drops to 0 then quickly recovers an indeterminate state of voltages may temporarily exist in the comparators and result in triggering the latches on. The latches set indicators, alarms, etc so if this happens even after power stabilizes the until will have to be shut down and restarted. A delay will prevent this since ideally the power supply will not power anything for a sec or two until after AC is restored. This situation can be artificially induced in fact by turning the power switch off then quickly back on.

The circuit is intended to use the remote on/off feature in fact, but instead of manual the delay circuit will operate it within the circuitry. This is in fact what I wanted to see if you had any insights. I am essentially just placing a delay switch in for the remote on/off using the M pin. Thanks!

Submitted by PI-csbabu on Mon, 04/19/2021

Understood, let me know if you face any issues once tested.

Submitted by scs2016 on Tue, 05/11/2021

Hello.  I would like to report that the increased delay circuit did indeed work.  I reduced the size of the 10 uF cap to 1 uF to give a start up delay of about 1-2 sec.  Note this is not "slow start" but an actual delay of the start up on the final output.  

I do see a concern though with the amount of peak currents I see driving the load, which happens to be another switching supply (which converts to a high voltage). The 18 V output is switched in and out of the primary of the HV transformer through the FETs.  I would expect some ripple in the current, but not this distorted.  I am including screenshots of this and the same measurement made while powering the HVPS from a linear bench supply.  Some ripple is there, understandably, but not as bad.  I am concerned the ripple current in the output capacitors is extreme, especially with current spikes going negative.  Is there something I can try to reduce the amount of spiking in the current?  I've also attached a sketch of the transformer design.  Schematics, layout etc already attached in earlier post.  thanks!