TOPSwitch-Jx Family IC: Soft start process and its effect on Frequency regulation, Duty cycle and Drain Source current
My english is not good but I hope everyone can understand and help me explain the problem. Thank you very much!
I am learning the TOPSwitch-Jx IC family to design an SMSP . When reading the datasheet about the soft start part, there is a problem I do not understand, according to the datasheet recorded that when softstart process of the IC is started, , the 17 ms soft-start sweeps the peak drain current and switching frequency linearly from minimum to maximum value by operating through the low frequency PWM mode and the variable frequency mode before entering the full frequency mode .
( low frequency mode ➞variable frequency mode ➞ full frequency mode)
soft start time is 17ms if the soft start is operating at low frequency then I think it is not very accurate.
From the datasheet, the sensor current at the Control pin(C pin) will be the main factor to control the operating frequency. The larger the sensor current at the Control pin, the frequency will be smaller.
The input voltage value at the Voltage Monitor pin (V pin) will be the main factor controlling the operating Duty cycle. The input voltage with the largest threshold value, the operating period is the smallest. The input voltage value with the smallest threshold value, the operating period is the largest.
So my question is can you explain to me the soft start process of TOPSwitch-Jx IC and its effect on both Oscillator with Jitter block and PWM block?
If possible, please explain to me the detailed structure of the Soft start block because it is not currently mentioned in the datasheet.