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TOPSwitch-Jx Family IC: Soft start process and its effect on Frequency regulation, Duty cycle and Drain Source current

Posted by: ThaiHoang on Thu, 06/03/2021

My english is not good but I hope everyone can understand and help me explain the problem. Thank you very much!

I am learning the TOPSwitch-Jx IC family to design an SMSP . When reading the datasheet about the soft start part, there is a problem I do not understand, according to the datasheet recorded that when softstart process of the IC is started, , the 17 ms soft-start sweeps the peak drain current and switching frequency  linearly from minimum to maximum value by operating through the low frequency PWM mode and the variable frequency mode before entering the full frequency mode .
( low frequency mode ➞variable frequency mode ➞ full frequency mode)
soft start time is 17ms if the soft start is operating at low frequency then I think it is not very accurate.
From the datasheet, the sensor current at the Control pin(C pin) will be the main factor to control the operating frequency. The larger the sensor current at the Control pin, the frequency  will be smaller.
The input voltage value at the Voltage Monitor pin (V pin) will be the main factor controlling the operating Duty cycle. The input voltage with the largest threshold value, the operating period is the smallest. The input voltage value with the smallest threshold value, the operating period is the largest.
So my question is can you explain to me the soft start process of TOPSwitch-Jx IC and its effect on both Oscillator with Jitter block and PWM block?
If possible, please explain to me the detailed structure of the Soft start block because it is not currently mentioned in the datasheet.

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Submitted by PI-Wrench on Tue, 06/08/2021

The first thing to understand about the TOPSwitch is that there is no feedback current into the control pin during the soft start process, as the output has not yet reached regulation. During the start-up interval, the IC runs on the energy stored in the 47uF capacitor attached to the TOPSwitch control pin, which is charged by a tap on the TOPSwitch power FET Once this capacitor charges to 5.8V, the IC initiates a soft start cycle.. The 47 uF capacitor supplies the necessary current during startup to run the IC, but not enough current to overpower the internal shunt regulator and and exert control. Once the output reaches regulation, the TL431 at the output turns on the optocoupler and provides both control feedback current and power to the TOPSwitch via the control pin. If the output does no reach regulation, the 47uF cap discharges to 4.8V,  startup is terminated, and the control pin charges again via the HV drain tap for another startup attempt.

Thanks for your feedback
I would like to ask more about frequency control during softstart (17ms). According to the above content, during the softstart period, there will be no feedback current from the output, so there can be no control effect at pin C pin. So what is the main cause of the frequency change?
Min 30Khz(low frequency mode)  ➞ Max 120Khz/60Khz(Full frequency mode)
According to the datasheet, the current through the pin C is the main factor controlling the operating frequency of the power supply.

Submitted by PI-Wrench on Mon, 06/14/2021

The soft start circuitry is a separate block inside the TOPSwitch controller that modulates current limit and frequency during startup without intervention by the control pin. Startup is triggered by two simultaneous conditions - 1) Input voltage exceeds the UV threshold 2) Control pin voltage is ~5.8V.