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TinySwitch-4 (TNY286DG) dropped output voltage.

Posted by: elnino1947 on Sat, 05/29/2021
  • Hello i am using TinySwitch-4(TNY286DG) for a power supply application target for input range of 85V to 500V AC 45Hz to 65Hz. With two isolated 5V outputs, the regulated output(where optocoupler feedback is present), rated current is 1.5A. I am also using FET stacking to increase my operating voltage beyond max drain voltage as recommended.
  • With no load or light load conditions the output performs with satisfactory output.
  • With around 80% to 100% (full load condition) my output voltage drops to about 4V  and sometimes down to 3V(depends on load) at certain voltage ranges namely from about 100V to 200V range, below 100V and above 200V the performance is again improved , and again at around 320V the output dips a bit ( some ripples)(not much of a concern in my application).
  • What's interesting to note that when the output voltage dropped(3v and 4v condition) I removed the optocoupler series resistor(R23) thus removing feedback and yet no change was observed (the output voltage should have risen exponentially here). 
  • This seems some kind of situation where the tiny switch is somehow saturated hence my first conclusion was the input voltage isn't enough but then the output  is completely fine below 100V which ruled out this theory. 
  • I have attached some waveforms and the schematic for the same below, the schematic was generated using PI expert and FET stacking was added manually to increase operation range








Submitted by PI-Jedidiah on Wed, 06/02/2021

Hi elnino1947,

Can you resend the schematic, waveforms, and PI-expert computations? Sorry, but I dont' see any attachment in your post.



Submitted by PI- MarcusJoaquin on Wed, 06/16/2021

Hi elnino1947,

The IC that you utilized in actual design based on your problem description is TNY286DG.

On your PIExpert spreadsheet the recommended part is TNY287 in Standard Current Limit Mode.


Possible problem using TNY286 in Standard Current Limit mode on your requirements is that current limit of the IC is already hit.

The maximum duty cycle of the device is exceeded, that requires changes in design reflected voltage or VOR or the ripple factor.

Here are the possible quick fix to see if your power supply can operate properly:

1. If TNY287 IC is available you can try as suggested by the PIExpert.

2. Try to change the current limit mode if you are still using TNY286 from Standard to Increase Current Limit Mode. You can change the capacitor across BP/M pin to S pin from 0.1uF to 10uF. This actually requires also some changes in the power supply parameters since we change the current limit but for quick check you can do this and see if your power supply will work properly.

For universal input voltage 85VAC to 265VAC at Peak Output Power Capability of TNY287 in Standard Mode and almost the same as TNY286 in Increase Current Mode Limit. They just have different in performance like efficiency which can be addressed by optimizing the power supply design but to hasten your troubleshooting try the TNY286 in increase current mode is TNY287 is not available.




Thank you for the detailed explanation and suggestion. we tried changing the capacitor and the results obtained were quite satisfactory for our application. Although at peak power we still observe a dropped output voltage. and this is only observed at input voltage range from 120VAC to 200VAC which makes me wonder why the output seems to be proper at voltages below 120V . 

thank you

Submitted by PI- MarcusJoaquin on Wed, 07/21/2021

Hi Elnino1947,

Can you monitor BP/M pin and the D pin of the IC? Please capture the waveform at good operation let say at 100Vac and at 120VAC to 200VAC.

The BP/M pin typical voltage is 5.85V if it goes down less than 5V the IC will restart.

What is the value of R15 and R16? The seriess resistor from the input voltage going to EN/UV pin.

Can we try to remove R15 and R16, then place a 390k-ohm resistor across EN/UV pin and S pin.

Submitted by PI- MarcusJoaquin on Thu, 07/22/2021

Hi Elnino1947,

This is additional analysis and recommendations. Possibly at lower input voltage the TVS D3 or the clamping voltage diode is not yet operational, the reason at low input voltage the problem of higher ripple output voltage or dipping of the output voltage to 4V or 3V is not occuring.

You can also monitor and capture the Vgs, Vds or the Id (drain current) of the StackFET Q1. Try to minotor it at 90VAC, 100VAC then at 120VAC , 200VAC and higher.

The root cause might be possibly Q1 or the StackFET is not properly operating due to its gate drive. Below are the analysis and recommendations.

1. Make sure that the Qg/Cgs is low, enough to properly drive or turn-on the StackFET Q1.

2. StackFET is being driven during turn-on by the charge stored on the parasitic capacitor of TVS, D3. The stored charge on the parasitic capacitor is from the previous turn-off stage.

3. If the parasitic capacitor of the TVS D3 is not enough to properly turn-on the StackFET, a parallel capacitor across D3 can be added. This is to ensure there's a enough stored energy to bias the gate of the StackFET during turn-on. However. you need to ensure that the total capacitance CD3 + Cexternal must be optimized or low enough so as not to increase or generate additional switching losses.

4. For layout, we have to minimize the StackFET driving loop area to reduce the parasitic inductances due to trace. This will ensure proper gate driving of StackFET, avoid gate oscillation and minimized the losses.

I attached two diagrams to better understand the analysis. (1) StackFET Gate Driving.jpg, which shows the CEQ or the total capacitance equivalent of the D3 parasitic capacitance CEQ = CD3 or if external capacitance is needed CEQ = CD3 + Cexternal. (2) is the layout consideration showing the schematic of the gate driving loop area for StackFET, that has to be minimized in order to properly drive the Stack FET.