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INN3977CQ - where does the recomendation for stackfet usage above 550V come from?

Posted by: pnowak on

Dear Sir or Madam,

My design team is highly interested in using yours INN3977CQ in our new project, but we stumbled upon some doubts. One of the requirement for our future product is capability of working with input voltages up to 560V. According to the INN3977CQ datasheet both drain & "V" pin maximum voltage (700V and 650V respectively) is sufficiently high for our application (taking in account leakage inductance induced transients), but the datasheet clearly states that:

"The StackFET circuit configuration, shown in Figure 10, can be used to increase the breakdown voltage in the circuit for the application of very high input voltage, higher than 550 VDC."

And that lead us to the considerations whether our application requires that stackfet configuration or not - surely we are 10V above stated 550V limit.

My question is - where does the recomendation for stackfet usage above 550V come from? What circumstances sets that value to exactly 550V? What are the potential dangers or consequences (apart from voltage stress on IC switch and "V" pin input) of not using stackfet configuration with input voltage of 560V?

Kind regards,

Piotr Nowak

回應

Submitted by PI-Logan on 11/30/2021

Hi Piotr,

Thank you for your interest in our products. 

The maximum drain to source voltage of the INN3977CQ would be "input voltage + reflected voltage (VOR) + voltage due to leakage inductance (Vlk)". For designs with inputs higher than 550VDC, there should be less than 175V for "VOR + Vlk" if we are to consider 90% derating (675V). This is very hard to design due to the fact that if we are to design the transformer with small turns ratio (small VOR), stresses at the secondary side circuit would be relatively higher. Another important consideration is the FWD pin voltage stress (max 150V) which would be higher if we design with smaller VOR. 

If you are to use INN3977CQ at >550VDC input, try to decrease the turns ratio (VOR) of the transformer while ensuring that the FWD pin maximum voltage is not exceeded. You can use the PIExpert tool to help you in this design. If the voltage stresses cannot be met, then you should consider using a StackFET configuration. 

Power requirement was not indicated but if this is within the capability of INN3996CQ, you can consider this as an option since it is rated 900V which gives you much more room to design at inputs >550VDC without the use of StackFET.