topswitch flybacks are voltage mode?
Hello,
I note that topswitch flybacks are voltage mode. I note that most of the powerint.com design notes show feedback using TL431/opto. However, page 641 of the book, "switch mode power supplies" by Christophe basso, states that "A voltage mode CCM flyback can be stabilized using a type 3 compensation amplifier. But the classical TL431 configuration does not lend itself very well to its implementation."
So how can you guarantee that we can really get stability with topswitch flybacks that use TL431/OPTO for feedback?
Comments
thanks, I see what you mean, so I wonder why Basso said what he did?, after all, according to your office, the RC zero solves the problem, is Basso just imagining a problem?
AN57 talks somethign about loop design for TOPSWITCH, hopefully you like it.
For your questions about Basso: his theroy is definietly correct. But the problem is how we model and design our systems.For example, aluminum cap used a lot for topswitch design, and the ESR and high capacitance of the aluminum cap set an zero at lower frequency. But for ceramic which is widely used in DC/DC, the zero frequency which is set by esr and the capacitance of the output capacitor is a lot higher. So for Alumimum cap, phase boost is not necessary, but for ceramic cap, you may have to use a phase boost circuit for the loop stability.
Regards
Basso is not talking about only using ceramic caps. On page 10 of AN57 it points out how the voltage mode topswitch there is stable in ccm, but then becomes unstable when going to dcm at higher input line....this never happens in current_mode...in current mode, dcm is always stable if ccm was stable. This is a disadvantage of voltage mode. Also, on page 12 of AN57 it states that the double pole resonance of the LC filter in the flyback is nicely damped by the ohmic resistance of circuit traces and winding resistance...so are you saying that the topswitch designs are only stable if you have a certain minimum values of stray resistance in the traces.
Why is there not one single powerint.com article stating why voltage mode is used in topswitch? Voltage mode is "generally" a thing of the 1980's...it has in majority cases been superceeded by current mode. Why are topswitchs using voltage mode.?
On page 6 of AN57 it states that the resonant frequency of L(e) and output cap has to be above 500Hz. This puts a sever restriction on the choice of values for the output capacitor...what if someone wants a big output capacitor for energy storage?
This is yet another disadvantage of voltage mode control.
Why are topswitchs not using current mode control.
A current mode dcm flyback is intrinsically stable, not so a voltage mode dcm flyback.
Voltgae mode and current mode is not important at all, as long as the loop is stable and design meets its SPEC. And we can not say current mode is better than voltgae mode, better or not is totally decided by application. Nothing can be perfect, neither current mode or voltage mode.
And honestly, topswitch is a very sucessful prodyct and it is used by a lot of custoemrs for different applications, and a lot of ICs from different companies choose voltage mode control too.
By the way, many technical books are not right, knowledge of the authors maybe limited, and they could make mistakes too.
Regards
On page one of the following, Dr Ray Ridley states that "current mode control is the best way to control converters"
http://switchingpowermagazine.com/downloads/15%20Designing%20with%20the%20TL431.pdf
Dr Ridley is one of the best smps engineers in the world, and runs virtually the only universally accepted smps attendance course in the world.
Can you name any other modern PWM control ic's which use voltage mode?...other than topswitch?.....I can only name one, and that is a certain type of ti.com active clamp controller. There are virtually not others.
Also, please could you explain why the LC resonant frequency referred to on page 6 of AN57 states that it should be greater than 500Hz.?....this puts unwanted restrictions onto output capacitor size.
Also, on page 12 of AN57 it states that fortunately the stray trace and winding resistances stop the resonant double pole of the flyback stage from beinga problem?.....what happens if these trace resistances are too low to be able to damp this resonance?
Most offline flybacks are dcm. AN57 admits that there is an instability problem with voltage mode dcm flybacks, in current mode, dcm is intrinsically stable.
Why has the topswitch implemented voltage mode, when current mode would have been prefereable and simpler?
I respect ray ridely too. But I do not agree with him that current mode control is the best. For some applications, voltage mode is better. and for some other applications, current mode is better. As a power supply designer, you may have to design for diffeent applications and different SPECs.
What if the power supply spec involves an large output energy storage capacitor, and this makes the LC resonant frequency less than the 500Hz referred to in AN57?..does this mean topswitch cannot be used?
TOPswitch is a monlithic power IC, it was designed to addrress applications with power level below 100W. For applications with huge output cap requirement, there maybe better solutions than topswitch. But I like to see that customers use topswitch for that applications.
Please could you explain why the LC resonant frequency referred to on page 6 of AN57 states that it should be greater than 500Hz.?....(LC resonant frequency between the flyback power stage inductor and output capacitance)
Page 47 of ray ridley's book "power supply design: volume 1: control" states that the crossover frequency should be at least twice the LC resonant frequency for voltage mode flybacks. So why then are powerint.com not declaring that the LC resonant frequency should be less then half of the crossover frequency?
Sorry for late response!
Unfortunately, the author quitted last year, and I donot like the 500 HZ limitation too. For me, as long as the LC resonat frequency is far away (either lower than fc, or higher than fc) from the cross over frequency, the loop should be stable with right compensation.
Regards

The 47uF cap and 6.8ohm resistor between C pin and S pin sets a zero. The dynamic impedance ZC of the CONTROL pin together with the external CONTROL pin capacitance sets the dominant pole for the control loop.
Actually TOPSWITCH is used by a lot of customers for different applications, and nobody complain the loop stability issue. You can either test the loop itself or check the load dyna,mic to make sure the loop design is good.
Regards