72W SMPS Design

Could you upload your schematic? it will give us a lot more information.

Regards

schematic.

Your schematic looks good, but PLS try the following solutions：

1. The issue maybe caused by current limit,modify R13 to check if increasing current limit can solve this problem.

2. the issue could be caused by noise coupling at high load. Could you use a 10uF  cap as decoupling to drive the optocoupler in the secondary side.

Regards

Hello,

Thank you very much for your reply.

I tried with the above 2 possible solutions, but it didn't effect the damped output.

I rechecked the design, and found this:

The bias diode(D3) suggested by PIExpert is 1N4934.

I replaced it with 1N4148 (with lower specs) in the PIExpert desig and it didn't give any design error on optimisation.

Now I changed this diode with 1N5408 (with higher specs). The output voltage changed from 17.2V to 23.5V.

What can be the reason, PIExpert didnt show any error for 1N4148 ? 

I am still getting 23.5V at 2.5A load compared to 24.4V at no load.

Can there be any possible reasone for this difference ?

Regards

Akshay

I guess You are almost there.

The issue could be caused by the low primary side bias voltage across C9. PLS use an external power supply to verify this. If the regulation can be improved with an 10V external bias, then you have to increase the turn numbers for the primary side bias. I really suspected the primary side bias, but i did not pointed it out,because normally the bais voltage at full load should be higher and the current through optocoupler at full load is lower too.

Regards

Hello,

I tried applying the external bais voltage, i.e connected variable voltage across C9, but it didn't work. 

I have now reached to 23.8V @ 2A. But still at 2.5A VOUT is 23.4V.

Any scope for further improvement ? 

Regards

For me the result is acceptable, I believe you can meet your spec. The 0.4V diffeence maybe caused by the distance between regulation point to real output terminal, or caused by noise..

regards

What noise it can be ? No load Vout is 24.4V and at 3A load Vout is 23.0V. The load regulation is getting worst.

Otherwise the efficiency and line regulation are good.

Vout at 3A is 22.0V

Hello, I am PI Worf,  I am taking over becasue PI-Cochrane  has left the company

My firt question for you is:

Are you measuring your output voltage right at the output connector of the power supply?  are you using Kelvin connection to meaure your output voltage?

Thank you

Hello,

SMPS has output cable(with ferrite core). A rheostat is connected at the output cable end.

I have checked for the cable voltage drop and was found to be approx.400-500mV at 2.5A.

Now I measure the output on SMPS PCB at output connector itself, and getting the output voltage equal to 22V at 3A load.

One more point observed is, at 2.5A load, when powered on, initial voltage is 22.3V and then it rises to 23.3V in about 3min.

Is the output filter values playing any role here?

Regards

It is a change in output voltage due to the thermal settling down of some components. Are you using Low ESR capacitors for C3 and C4?

One way to try to improve the output regulations is to increase the DC gain of the loop.   You can do it by reducing the value of R6. You can reduce it about 10 %.   You will notice an improvement on the output regulation. 

Yes, there is a cosiderable change in output voltage at full load of 3A by changing the loop gain resistors value.

I would like to know how the feedback network comprising of R6, R4, C10 & R8 works. How the amount of current is calculated to attain the required output. What is the formula in terms of Vout ?

Regards

YOu can read about it in the following link.   Go to application notes and you will see what I think are the best papers about smps control loop.  http://venable.biz/applications/application-notes/  Also you can check http://www.powerint.com/sites/default/files/product-docs/an57.pdf    Hope this info is useful to you